The invention is directed toward the field of continuous-time circuit filters, and more particularly, to a method and apparatus for matching the frequency characteristics of such continuous-time circuit filters having different circuit topologies.
Continuous-time integrated circuit filters generally use combinations of resistors and capacitors as tuning elements to achieve desired frequency characteristics. Such continuous-time filters are used in many applications, including cellular telephones, high fidelity audio equipment, multi-media computers, and sensors. In many of these applications it is often necessary or desirable to achieve high precision in calibration and matching between different circuits that are expected to track each other. For example, in some applications it is necessary to match the pole frequency of a tuned filter to the pole frequency of a reference tuning circuit that may have a different topology. In addition, the matched circuits might also have constituent elements that must scale with each other, but which have substantially different electrical values, as is common in a multi-pole active filter.
It is therefore desirable to select circuit components when designing a filter that provide the necessary frequency characteristics. Nonetheless, process variations during fabrication and other factors can cause significant variations from chip to chip of resistance and capacitance values often resulting in frequency responses that differ significantly from the initial design. Since the frequency characteristics of a filter are primarily dependent upon the values of the resistors and capacitors comprising the filter, the frequency characteristics of a filter at the end of fabrication will not meet the tolerance requirements for the given application if the resistance and capacitance values of the filter are not clearly defined during the design stage.
There are many parasitic elements in continuous-time filters that make it difficult to precisely calibrate and match the frequency characteristics between different circuits that are expected to track each other. For example, it has been observed that the parasitic capacitance can be a substantial fraction of the primary capacitance (10% to 20% or more), depending on the capacitor structure of a given manufacturing process. In addition, there is generally little correlation between variations in the primary capacitance per unit area and the parasitic capacitance per unit area.
A need therefore exists for a method and apparatus for matching filter capacitors that have different circuit topologies, such as matching capacitors connected in a differential configuration with capacitors connected in a single-ended configuration, in such a way that both the primary capacitance and the parasitic capacitance are optimally matched. A further need exists for a method and apparatus that provide optimal matching of both primary and parasitic capacitances for integrated circuit capacitors which may be of different sizes and connected in different circuit topologies.
Generally, a method and apparatus are provided for matching the primary and parasitic capacitances of integrated circuit capacitors. The integrated circuit capacitors to be matched in accordance with the present invention can be of different sizes and connected in different circuit topologies. In accordance with the present invention, a matching filter may be selected that is matched in a desired manner to a reference circuit. The matching filter and the reference circuit can have a different topology. For example, the matching filter can have a differential filter capacitor structure and the reference circuit can have a single-ended filter configuration.
According to one aspect of the invention, the reference circuit to be matched is initially analyzed to identify the ratio of the primary capacitance, Cp, to the parasitic capacitance, Cg. Thereafter, a matching filter is selected with the desired topology and having the same ratio of the primary capacitance, Cp, to the parasitic capacitance, Cg, as the reference circuit (or a desired offset therefrom). A general technique is disclosed for analyzing capacitance circuits to identify the ratio of the primary capacitance, Cp, to the parasitic capacitance, Cg.
The present invention provides a way to match both primary and parasitic capacitances among filter and tuning circuits that incorporate capacitors with different circuit topologies, and thus match the circuit characteristics independently of process variations. Also, the implementation is simple, and the total capacitance required is about the same with or without this technique.